Out with the old
...in with the new

Copper will increasingly replace aluminium as semiconductor companies continue to scale down feature sizes. Dave Cavanaugh and Joanne Itow of research body Semicos manufacturing group explain why.

Aluminium and oxide processing is a well-understood semiconductor manufacturing process and has been the workhorse process technology in this industry for many years. A major shift occurred in CMOS wafer processing when manufacturers began working with line widths smaller than 0.18-micron. Today, it is generally accepted that copper metallisation is a must for advanced designs at 130nm and smaller.

Semico recently completed a study that provided a review of copper, low-k technology and examined how and why the industry developed this capability. The study also projected copper layer demand by device type, process node and year, and finally gave an outlook for copper processing in the future. Here, we summarise the results of the study.

Why copper?
A reasonable question is why did the semiconductor industry turn to copper metallisation and low-k dielectrics as an alternative to aluminium and oxide (SiO2)? Why undertake the risk and cost to make such a fundamental change? Simply put, the answer is as geometries shrink, aluminium and oxide cannot perform as a device wiring system.

More specifically, there are three main reasons why copper is now used in CMOS wafer production:

1. Resistivity: switching to copper reduced power dissipation on metal lines.

2. Signal delay: increases in signal delay resulting from shrinking feature sizes began to present a problem at the 130nm process technology node. The industry turned to copper and low-k to combat the increased delay.

3. Crosstalk: as lines get closer together, there is a greater tendency for crosstalk to occur. The length of the line, the close proximity of the lines as dimensions shrink, and the dielectric constant of the insulating material between the lines are major factors affecting line-to-line capacitance and crosstalk. Therefore, devices need the lower resistivity afforded by copper and the lower dielectric constant afforded by low-k insulators to reduce the signal crosstalk.

Outlook for copper demand

It is interesting to note that even though many analysts are forecasting a slowdown in 2005, copper layer demand is expected to increase over the next five years. Because copper layer demand is primarily dependent on advanced technology IC unit demand, and unit demand continues to increase, the number of copper layers is forecast to rise over the period of 2004-2008.

Most of the copper layer demand will be generated by products processed at 90nm technology and below. In 2005, 130nm processes currently remain steady but they will begin to decline in their relative contribution to total copper layer demand as wafer processing at 90nm increases. Beginning in 2007, copper layer demand will start to grow at the 65nm process technology node. This growth is likely to be stronger than that generated by both 90nm and 130nm wafers.

During 2004-2006, manufacturers of digital signal processors (DSPs), standard cell, microperipherals and microcontrollers will generate the largest copper layer demand. In 2007 and 2008, a growing portion of Flash and DRAM unit volume will use copper. This will create a large copper layer demand from memory devices in the later years of the forecast period.

Memory is an interesting product category when it comes to copper process usage. Today, most memory products continue to use aluminium interconnects. In addition, memory products require fewer metal layers, generally only three to four metal layers versus up to eight or nine metal layers on a comparable logic process. But the memory product category is so large in terms of units that, whenever a process or material change occurs, the result is exaggerated in terms of volume.

There will be some demand for coppery layer from 200mm-wafer/90nm node fabs through 2006, mainly from DSP, microprocessors and microperipheral products. But most of the copper demand is likely to come from 300mm/90nm fabs through to 2006 and 300mm/65nm fabs in 2007 and 2008.

Copper/low-k outlook

The adoption of the 130nm copper/low-k process was much tougher to achieve than most industry leaders expected. But the hard work has been done and now 90nm copper/low-k process development is benefiting from the knowledge gained at the 130nm node. In fact, 90nm copper/low-k processes are already in production at several advanced fabs.

The focus now is on improving cost and throughput. Cost is the main factor affecting implementation of 90nm processes by second tier fabs. In general, the equipment and process are still just too expensive and challenging for tier two companies.

Looking ahead, 65nm copper processes are already in late-stage development at advanced fabs. Companies are already finding solutions to solve the problems of dishing and thinner barriers. Most of the focus is now on ultra-low-k dielectric integration.

At the most advanced fabs, 45nm processes are in the early stages of development. Here, researchers are working on copper and low-k dielectric integration as well as electromigration. Copper clearly has a very bright future in the semiconductor industry.

Figure 1. Copper layer demand will rise rapidly as the industry moves to ever smaller dimensions.